Bilal completed his BEng Electrical and Electronic Engineering from Namal College, Mianwali in 2015 followed by Masters in Electrical Engineering from Lahore University of Management Sciences (LUMS) in 2018. He started his Ph.D. in Computer Sciences in November 2019. He is working on creating the variants of interrupt controller units (ICUs) to test the Automatic Design of Digital Circuits (ADDC). His research interests include the automation of Digital Circuits and Biomedical Diagnostic Devices.

Publications

2025

Dias, Douglas Mota, Majeed, Bilal, Ryan, Conor, Sarma, Rajkumar, Youssef, Ayman. 2025. Automatic Generation of Synthesisable Hardware Description Language Code of Multi-Sequence Detector Using Grammatical Evolution. Algorithms, 18, 345. doi: 10.3390/a18060345.

2024

Dias, Douglas, Majeed, Bilal, McEllin, Jack, Ryan, Conor, Sarma, Rajkumar, Yousef, Ayman. 2024. Grammatical Evolution of Synthesizable Finite State Machine-Based Behavioural Level Hardware Description Language Codes. doi: 10.5220/0012948300003837.

2023

Carvalho, Samuel, Dias, Douglas Mota, Majeed, Bilal, Murphy, Aidan, Ryan, Conor, Youssef, Ayman. 2023. Performance Upgrade of Sequence Detector Evolution Using Grammatical Evolution and Lexicase Parent Selection Method. In: Complex Computational Ecosystems, Springer Nature Switzerland.
Carvalho, S, Dias, D, Majeed, B, McEllin, J, Murphy, A, Ryan, C, Youssef, A. 2023. Evolving Behavioural Level Sequence Detectors in SystemVerilog Using Grammatical Evolution. In: 15th International Conference on Agents and Artificial Intelligence (ICAART) 2023.